Numerical Simulation Model Development and Comparative Analysis of Low-voltage SiC BJT for Compact Modeling

The paper presents a comprehensive investigation of the key differences between the characteristics of Si and SiC low-voltage (LV) BJT. The purpose of this investigation is to identify the special characteristics of SiC LV BJT which will require changes in the parameter extraction sequence of the conventional compact models. Characteristics of LV SiC bipolar devices fabricated in KTH's ion-implantation-free process are compared with a similar Si BJT characteristics. The investigation proves that key differences arrive from the low intrinsic carrier concentration, high contact resistance, and the presence of interfacial trap states in the SiO
₂
/SiC interface. To verify the claims, TCAD deck for LV SiC bipolar device has been developed. TCAD simulation results clearly indicate the importance of interface trap states and, comparatively, large internal resistance in the base region. It also verifies the very low current of SiC BJT at the operating voltage range of Si BJT, which is difficult to measure with curve tracers.