Design of quadrature error correction loop for communication

The proposed circuit is analog closed loop circuit which corrects quadrature error over high frequency range. The exhibited circuit comprises of stage bolted circle type engineering and it is helpful for quadrature blunder redress. Simple shut circle is utilized to address quadrature mistake for advanced clock. It consumes 1.99mA current from 1v supply over high frequency range. The circuit was design in cadence virtuoso software in 90nm technology file. The circuit works over high frequency range that is 100MHz to 2GHz. In presented method impact of duty cycle distortion due to mismatch in input clocks also discussed. The proposed technique works on high frequency as well as low frequency.