High-Density and Highly-Reliable Binary Neural Networks Using NAND Flash Memory Cells as Synaptic Devices

A novel synaptic architecture based on NAND cell strings is proposed as a high-density synapse capable of XNOR operation for binary neural networks (BNNs) for the first time. By changing the threshold voltage of NAND flash cells and input voltages in complementary fashion, the XNOR operation is successfully demonstrated. The large on/off current ratio (~7×10
⁵
) of NAND flash cells can implement high-density and highly-reliable BNNs without error correction codes. It is shown that without conventional ISPP scheme, only 1 erase or program pulse can achieve sufficiently low bit-error rate. Finally, the estimated synapse area of VNAND memory with 128 stacks is ~100 times that of 2T2R synapse in RRAMs.