Implementation of LSTM Accelerator for Speech Keywords Recognition

The speech keyword detection system is generally used to detect a specific wake-up word spoken by the user, as a simple interactive command between the user and the device, or a front end of a larger voice recognition system for determining whether to open a large speech recognition system at the back end. Yet, such keyword recognition systems are always active, hence have strict power and latency constraints. This paper proposes an implementation of an LSTM accelerator based on an iterative linear approximation scheme, which optimizes the circuit implementation while maintaining high accuracy and reliability. The scheme of this paper has been verified on the FPGA board, and real-time speech recognition power consumption is only less 150$\mu$w.