IC Camouflaging by Using Universal Gates under Timing Constraints

IC (integrated circuit) camouflaging can increase the difficulty of reverse engineering. Previous work performs the IC camouflaging by using camouflaged NAND and NOR cells. In fact, since NAND and NOR are universal gates, we can further replace other gates by NAND or NOR cells for IC camouflaging. As a result, the difficulty of reverse engineering can be further increased. Based on that observation, in this paper, we propose an effective approach to replace other gates for IC camouflaging under timing constraints. Benchmark data consistently show that the proposed approach works well in practice.