Amoeba-Inspired Hardware SAT Solver with Effective Feedback Control

In this paper, we focus on an amoeba-inspired algorithm, "AmoebaSAT," to solve Boolean satisfiability (SAT) problems. A hardware SAT solver is useful for a variety of control applications in Internet-of-Things edge-computing systems whose control constraints can be reduced to a SAT problem. We develop efficient AmoebaSAT solvers on an FPGA by realizing various feedback controls to find a solution quickly. To extract the inherent parallelism of the AmoebaSAT, a high-level design approach (i.e., high-level synthesis and its pragmas) is applied together with hardware-friendly code transformations/algorithmic extensions. We demonstrate that our FPGA-based AmoebaSAT solvers can achieve significant iterations reduction and speedup to find a solution compared with state-of-the-art SAT solvers. Furthermore, we show the effectiveness of our work in the scalability (i.e., resource utilization in FPGA) and the parallelism.