Characterization of the Self-Enhanced Class J PA Operating Mode in LDMOS and GaN Transistors

The classical description of the Class J operating mode of RF power transistors, featuring a linear drainsource capacitance (C_DS), predicts that maximum RF output power and efficiency are equal to what they are in Class B and that their values remain constant over the entire continuum from Class B to Class J and J*. However, harmonic load-pull measurements showed that both maximum RF output power and efficiency increase by up to 0.4dB and 16%points, respectively, in Class J. This trend was observed on both LDMOS and GaN devices, at any frequency and at any operating voltage. In previous work, we explained that this is thanks to the non-linearity of C_DS. In this paper, we compare measured and simulated results of a Class BJ/BJ* characterization campaign of a 5mm LDMOS transistor at 2GHz and a 0.7mm GaN transistor at 4.7GHz and use their respective model's non-linear C_DS to understand its behavior as a second harmonic voltage source.