Hardware evolution of AES algorithm on FPGA

Hardware evolution adopts the principle from evolutionary computing which finds the optimal solution to a problem using an evolutionary algorithm. Hardware evolution can create new hardware circuit from basic units like gates without human intervention. Evolution at a more abstract level is called function level evolution. The paper presents a functional level evolutionary system, which evolves AES algorithms from basic operations Substitute Byte, Shift Rows, Mix Column and Add Round Key. The Genetic algorithm is used for evolution with confusion, diffusion, and randomness as fitness function parameters. The average percentage of output that passes randomness test (test value ≥0.01) is above 98%.