Predicting Interferences of Switching High Voltage Devices on Mixed-Signal Designs

Interferences between different system components are a major source of system degradation in high voltage integrated circuits (ICs). Thereby, substrate coupling plays an important role. Silicon-on-insulator wafers can reduce the substrate coupling between components of different voltage domains due to the buried oxide (BOX). However, switching high voltage quasi-vertical double-diffused MOS transistors have their drain close to the BOX and can introduce a substrate current into the handle wafer. The influences of substrate fluctuations on a capacitive sensor excitation are investigated. A substrate network and its automated extraction are presented for the prediction of interferences using SPICE simulations. It can validate the measured influences of a fully integrated three-state inverter with up to ±300 V fabricated in a 1 μm process on a spread spectrum clock generator. With the proposed method, high voltage interferences on the IC can be predicted well in prior to fabrication.