Acceleration and Implementation of Convolutional Neural Network Based on FPGA

Aiming at the problem of high power consumption and slow operation speed of neural network in embedded system, this paper presents an automatic design method of convolutional neural network (CNN) accelerator based on field programmable gate array (FPGA) to meet the requirements of embedded terminal for operation performance and power consumption. Firstly, in order to reduce the storage resources of the FPGA and the time required for network computing, the weight quantization method is used to convert network parameters from floating-point data to binary data. Secondly, in order to improve the speed and throughput of the whole system, coarse-grained and fine-grained parallel computing optimization methods are used. In this paper, the above acceleration scheme will be applied to the scene of unmanned aerial vehicle (UAV) object detection. The test results shows that the power consumption of the system is 2.38W and the calculated power consumption ratio is 29.3GOPS/W. Compared with the work of related literature in recent years, the proposed scheme can provide higher speed and efficiency. The experimental results show that the accuracy of the IOU is 21% and the speed is 7FPS.