Design of a Transmitter for Inductively-Coupled High-Bitrate Communication in Stacked Chips

The design of a circuit to transmit contactless data between two stacked chips is presented in this brief. The communication is performed through magnetic coupling of a pair of inductors, where the primary and secondary inductors are integrated into the transmitter and receiver chips, respectively. The series decoupling capacitor topology is chosen due to the absence of static power consumption. The dynamic characteristics of the topology are properly equated to identify the design trade-offs. Also, the performance metrics for the transmitter circuit are defined. Considering those metrics and the analysis of the topology, a design methodology is proposed. The transmitter implemented in CMOS 180nm technology supports a 5Gbps data rate and consumes 1.3pJ/bit when verified in simulations.