A 4.5 GΩ-Input Impedance Chopper Amplifier With Embedded DC-Servo and Ripple Reduction Loops for Impedance Boosting to Sub-Hz

Achieving a high input impedance
${Z} _{\mathrm{ in}}$
is important for the instrumentation amplifier (IA) performing neural and biopotential signal sensing. Previously, impedance boosting techniques have been used with a positive feedback loop (PFL) driven by the output or auxiliary (AUX) path driven by the input. We propose that the conventional approach to DC-servo loop (DSL), which blocks the electrode offset (EOS), does not fully enable the function of a PFL or AUX path. This results in either limited impedance boosting or reduction of a low-frequency
${Z} _{\mathrm{ in}}$
in the sub-Hz band. To solve this problem and achieve
${Z} _{\mathrm{ in }}$
boosting down to sub-Hz, we propose a new approach to DSL for a capacitively-coupled chopper instrumentation amplifier (CCIA). The proposed DSL is realized using a 30-nA opamp, and the AUX path is designed using a 450-nA duty-cycled buffer. The CCIA achieves a gain of 40 dB and is implemented using a
$0.18~\mu \text{m}$
CMOS process with an area of 0.19 mm
²
. The measured results show that
${Z} _{\mathrm{ in}}$
is increased by 184 times up to 4.6
$\text{G}{\Omega }$
at 0.01 Hz. Compared to the CCIA using conventional DSL,
${Z} _{\mathrm{ in}}$
is improved by 7.8 times. An input-referred noise of
$2.1~\mu \text{V}_{\mathrm{ rms}}$
is achieved at
$2.14~\mu \text{W}$
.