A Single-Ended Offset-Canceling Sense Amplifier Enabling Wide-Voltage Operations

The input-referred offset voltage (
$\text{V}_{\mathrm{ OS}}$
) of the sense amplifier (SA) often dictates the minimum required differential voltage swing on bit-lines and is an important indicator that determines the access delay and the energy dissipation of low-power SRAMs. This brief presents a single-ended offset-canceling sense amplifier (SOSA), where a capacitor stores the offset voltage and another capacitor couples the bit-line voltage swing to the internal sensing node. SOSA can be operated in a wide range of
$\text{V}_{\mathrm{ DD}}$
and is more compatible with low-power 8T SRAMs with large array configurations. According to the simulation results under TSMC 28nm CMOS technology, the average standard deviation of
$\text{V}_{\mathrm{ OS}}$
(
$\sigma _{\mathrm{ OS}}$
) and the average sensing delay of SOSA across 0.2V to 0.9V
$\text{V}_{\mathrm{ DD}}$
are only 5.83% and 15% of the baseline respectively. And compared to the state-of-the-art, it can reduce
$\sigma _{\mathrm{ OS}}$
by 2.2X.