A Low-Spur and Intrinsically Aligned IL-PLL With Self-Feedback Injection Locked RO and Pseudo-Random Injection Locked Technique

A novel injection-locked phase locked loop (IL-PLL) with low spur and low phase noise is presented in this paper, in which self-feedback injection locked ring oscillator (SFIL-RO) and pseudo-random injection locked technique (PRILT) are presented. SFIL-RO, of which the oscillation signal is feedback to the input of the pulse generator to generate injection pulse, is proposed to achieve inherently aligned injection timing to decrease the injection spur. Meanwhile, it avoids the risk of suffering from pseudo-locking phenomenon, enhancing the immunity to the PVT variation. The periodicity of conventional injection behavior is broken in proposed PRILT, which essentially reduces the spur. The actual output of the IL-PLL with PRILT is the pseudo-random edge combination of two SFIL-ROs. Thus, the equivalent injection pulse is aperiodic. Calibration circuit is included to cope with the mismatch between two SFIL-ROs. To demonstrate the effectiveness of the proposed SFIL-RO and PRILT on optimizing spur, an IL-PLL was fabricated in SMIC 180 nm CMOS process. Measurement results show the best spur of -67.2 dBc and the RMS jitter of 124 fs are achieved when SFIL-RO and PRILT are activated. The core area was 0.142 mm
²
and the power consumption is 6.1 mW from 1.8 V supply voltage.