A Wide-Voltage-Range Half-Path Timing Error-Detection System With a 9-Transistor Transition-Detector in 40-nm CMOS

To reduce conservative timing margin in digital circuit designs, adaptive techniques based on timing-error detection were proposed to monitor the timing of selected critical paths. However, most of them can respond only to the detected error signals in the next, or a few, clock cycles. Then too, they usually have a large area overhead. In this paper, a low-overhead, 9-transistor transition-detector (TD) is proposed for use at a wide voltage range down to near-threshold voltage. These TDs are inserted at the half-path points of the critical paths as opposed to the conventional endpoints, so that the timing errors in the current clock cycle can be detected in advance to prevent actual timing errors at the endpoints. A half-path insertion point selection method is proposed here, with the middle points merging to reduce the number of inserted TDs. Test chips employing the proposed design approach are fabricated in a 40-nm CMOS process. Silicon measurements demonstrate that the whole design has achieved a 41.2% to 50.5% energy saving at near-threshold voltage as compared to conventional margined design at 0.56 V, and with a small area overhead. Thus, it is an effective method for a low-power and energy-efficient circuit design.