Fast Supersingular Isogeny Diffie–Hellman and Key Encapsulation Using a Customized Pipelined Montgomery Multiplier

We present a pipelined Montgomery multiplier tailored for SIKE primes. The latency of this multiplier is far shorter than that of the previous work while its frequency competes with the highest-rated ones. The implementation results on a Virtex-7 FPGA show that this multiplier improves the time, the area-time product (AT), and the throughput of computing modular multiplication by at least 2.30, 1.60, and 1.36 times over SIKE primes respectively. We have also developed a CPU-like architecture to perform SIDH and SIKE using several instances of our modular multiplier. Using four multipliers on a Virtex-7 FPGA, the encapsulation and the decapsulation of SIKE can be performed at least 1.45 times faster while improving the AT by at least 1.35 times over all SIKE primes. We have also evaluated our implementation on two other FPGAs. The implementation on Artix-7 improves the time and the AT of performing these two steps of SIKE by at least 1.90 and 1.80 times, respectively. On Kintex UltraScale+, these improvement factors are 2.05 and 2.08, respectively. On this device, these two steps take 3.11, 3.52, 4.66, and 6.59 milliseconds on
$p_{434}$
,
$p_{503}$
,
$p_{610}$
, and
$p_{751}$
, respectively.