A Self-Clocked and Variation-Tolerant Unified Voltage-and-Frequency Regulator for In-Order Executed Digital Loads

A self-clocked unified voltage-and-frequency regulator (UVFR) is proposed to provide a highly correlated voltage-and-clock pair and to guarantee error-free operation of an arbitrary in-order executed digital load. Built on a digital low-dropout regulator (D-LDR), the unified control loop is highly synthesizable and adaptively clocked to achieve both fast transient response and low quiescent current. Replica frequency-locked loops (FLLs) and hysteresis switching logic (HSL) are employed to compensate for the built-in offset of conventional beat-frequency (BF) quantization and provide calibration-free regulation to tolerate global and random variations. Fabricated in a 65-nm CMOS process, the proposed UVFR reduced the voltage undershoot by 25%, reduced the steady-state offset by 84%, and achieved a 5.9X wider adaptive clocking range compared to the baseline with the help of our proposed replica FLLs and HSL.