Application of Repetitive Ripple Estimator in Synchronization of Three Phase Grid Tie Inverters

The aim of this paper is to present the enhancement of the synchronous reference frame phase-locked loop with a repetitive control-based filter. This paper starts with the mathematical description of voltages that can be expected in low voltage grid after which condition for grid voltage vector tracking in the synchronous reference frame is derived. Small signal model of a phase-locked loop that uses this principle is presented along with a way for parameter selection. In the next section, repetitive ripple estimator is induced and its description in continuous and discrete-time is provided along with tradeoffs that are made with the change of one presented parameter. The phase-locked loop that uses the proposed filter is compared to the one that uses moving average filter and the one without any filter in a simulation. Comparison is made on tests that include voltage sags, harmonics, DC offset, random noise, and fundamental frequency change.