The Experimental Study on SEU Hardened Effect of Flash FPGA for Space Application

SEU hardened design is done for BRAM and register of a Flash FPGA. Test is performed to verify the measures. It shows the cross section reduces 2 orders and 75%, respectively. SEU rate is calculated for different orbits. It reduces 4-5 orders for hardened BRAM and 2-3 orders for hardened register.