Efficient Harmonic Rectifier Circuit for Wireless Power Transfer Application

In this paper, a novel harvesting technique making use of the harmonic rejection filter is proposed to enhance the efficiency of conventional rectifying circuit. In order to achieve maximum RF-DC conversion efficiency, the rectifying circuit is realized using a matching unit, the conventional voltage doubler, two filters and higher order harmonic recycling unit. The voltage doubler is composed of two diodes and a chip capacitor, whereas the recycling unit is configured using the interdigital capacitor and a diode. Two harmonic rejection filters, filter-1 and filter-2 are constructed using three radial stubs with varying dimensions. Firstly, the entire circuit is designed and simulated using the ADS software and characteristics of these filters are verified through EM simulation using CST microwave studio software. In the next step, the designed circuit is fabricated on a low-cost FR-4 substrate and tested for validation of results. It is found that, at the designed frequency of 800 MHz the proposed circuit provides efficiency of 73% at 3 dBm input RF power. This efficiency is 18% higher than the efficiency obtained through conventional voltage doubler rectifying circuit and hence, the proposed rectifying circuit can potentially be used for efficient wireless power application.