Design and Characterization of a high-rate readout backend for ePix detectors at LCLS II

The high repetition rate of second generation FEL is pushing the requirements of photon science x-ray cameras. In particular LCLS-II, planned upgrade of LCLS, will be able to operate at a continuous rate of 1 MHz. To exploit the new possibilities of this novel machine an upgrade program for the ePix family of detectors is undergoing. ePix ASICs integrate the core functionalities of the ePix cameras. Their architecture is based on a common platform composed of a random access analog matrix of pixel with global shutter, fast parallel column analog readout. ePixHR represents and incremental step toward higher rates to be achieved by substituting the back-end of the ePix ASICs with a digital readout and on-chip ADCs (analog-to digital converters) per column. New generation of ePixHR will incrementally achieve frame rates of 5 kHz, 25 kHz, and 100 kHz. A prototype ASIC containing 64 ADCs and two 1Gbps serializers has been fabricated. The implemented ADC are based on a novel 2 stage MASH sigma-delta architecture providing 14-bit resolution at 1Msps. The new backend architecture and the results of its characterization are here presented.