The Analysis for Bump Resistance Improvement by Optimizing the Sputter Condition

Along with the advanced technology development, the tinier polyimide opening (PIO) and bump size are required. However, it will make the bump resistance (Rc) become higher which is closely related to the chip probing (CP) performance. In addition, the additional pre-oven method may have limited effect to improve it especially for advanced tech node. Therefore, this paper proposes some alternative approaches for Rc improvement through optimizing pre-etching chamber condition during the sputter process. First of all, the backside cooling method to cool down the temperature of wafer to reduce the outgassing reaction on surface is introduced. The aluminum (Al) pad pasting is another approach to avoid C, O element reaction by Al atoms covering generated by plasma bombard on Al pad. Furthermore, the optimal pasting count balanced by the Rc and throughput is studied in this paper as well. A novel concept presented is to utilize the hybrid gas in pre-etching chamber for bump Rc improvement, whose purpose is to induce reduction-oxidation reaction (redox reaction) by other gas to remove the oxidation on wafer surface. The experiment is performed by a test vehicle with small PIO, and the Rc results show that presented methods can effectively improve bump resistance. In addition, two kinds of experimental polyimide material with different glass transition temperature coefficient (Tg) are used to verify the feasibility of proposed methods.