A New SI-PI co-Simulation Approach for Efficient Consideration of Coupling Between PDN and SDN

As the clock frequency of SOC (system on a chip) including core circuits like CPU and GPU and various IOs like LPDDR4, LPDDR5, and SERDES, increases, the impact of SDN (signal delivery network) and PDN (power delivery network) on the functional stability and low power operation of corresponding circuit blocks becomes more and more important. However, there has been the challenge to the design and verification with co-simulation of SI (signal integrity) and PI (power integrity) considering the coupling between SDN and PDN due to a painful long simulation time, which is usually not allowed in the short design cycles required by modern electronics especially in mobile hand-held devices. This paper will provide a matrix formulation for SI-PI co-simulation in frequency-domain to reduce the simulation time and consider the coupling efficiently.