I. Introduction
Traditionally high-performance analog-to-digital conversion is achieved by means of conventional analog building blocks, such as operational amplifiers [1] and [2], and highly-matched capacitive DACs in a feedback loop [3]. However, in advanced technology nodes, due to supply voltage scaling and reduced intrinsic transistor properties (e.g. lower gain, mismatch), these building blocks become more and more difficult to design [4]. Moreover, these analog architectures do not follow the same power reduction and area scaling as digital circuitry, resulting in a large power and chip area in scaled CMOS technologies. Finally, purely analog solutions suffer from poor portability to other technology nodes.