From Gate Oxide Characterization to TCAD Predictions: Exploring Impact of Defects Across Technologies

Despite extensive modeling efforts, not all semiconductor fabrication processes are fully understood on a physical level and phenomenological tools are used to analyze process splits. This works well for incremental improvements but has limitations when it comes to more fundamental developments. TCAD simulators, on the other hand, offer physical models and consider non-homogeneous field distributions and the effect of discrete charges. However, they are considerably more complex to use and to parametrize which can make them impractical. Therefore, the efficient gate stack simulator Comphy was presented recently which is used to extract physical defect properties. In this work, a development strategy is presented which employs this extraction methodology followed by an import of the defect parameters in a TCAD simulator. Using the same gate stack on different geometries we study the degradation and time dependent variability which increases from planar MOSFETs to FinFETs and is even worse for nanowires.