Digital Background Calibration for Binary DACs in Continuous Time Delta Sigma Modulators

A digital background calibration technique was proposed to estimate and correct the mismatch error related to the elements of a multi-bit binary DAC applied in a continuous time delta sigma modulator (CTDSM). Due to the large mismatch error in binary-weighted DACs, the use of these in delta-sigma modulators rarely happens. In order to make it possible to use of binary DAC a digital technique is presented. This study aimed to find the error associated with each binary DAC element using the correlation technique between a random signal and a modulator output. Results of simulation on a third-order six-bit delta sigma demonstrated that this method can estimate the error value of each element with high precision and raise the modulator accuracy up to an ideal value, independent of the OSR value. Compared to a six-bit unary DAC calibrated in the same way in which the coefficient of error of 2
⁶
-1 elements should be calculated, this number was reduced to 6 coefficients in a binary DAC and thus, the time and circuit necessary for calibration significantly decreased.