Practical One-Step Solution of Smoothly Tapered Junction Termination Extension for High Voltage SiC Gate Turn-off Thyristor

This work proposes a practical one-step solution to form a smoothly tapered junction termination extension (ST-JTE) for bipolar devices, verified by fabrication of SiC GTOs achieving 8.6 kV. This one-step solution is comprised of direct photolithography and etching with a single graded mask. The mask is improved with three methods for better etched profile. This solution is practical and advanced for (1) greatly reduced fabrication time and cost, (2) processes more controllable and repeatable in mature production, and (3) elimination of implantation damage with the least etching damage around the main junction. Therefore it is promising to be applied in SiC bipolar devices.