A Novel CSTBT with Hole Barrier for High $dV/dt$ Controllability and Low EMI Noise

In this work, a novel CSTBT with hole barrier (HB-CSTBT) is proposed for power switching applications. Different from the conventional CSTBT, the HB-CSTBT features the buried P/N junctions under the CS-layer. During the turn-on transient, the buried P/N junctions are depleted laterally to set hole barrier near the gate bottom, suppressing the accumulation of hole carriers in this region. As a result, the gate self-charging effect caused by reverse displacement current is suppressed, contributing to high dV/dt controllability and low electromagnetic interference (EMI) noise. It is found from simulation results that the HB-CSTBT reduces the maximum reverse-recovery dVKA/dt by 66% in comparison with that of the CSTBT, which is of great merit in the EMI noise suppression. Moreover, the HB-CSTBT also overcomes the blocking capability degradation brought by the CS-layer without compromising the other device characteristics.