Program Voltage Generator with Ultra-Low Ripple for 3D NAND Flash in Standard CMOS Process

In this paper we present an ultra-low ripple program voltage generator for 3D NAND Flash memories with the scheme of proposed dynamic clock voltage scaling. The noise in program voltage should be minimized to reduce the width of threshold voltage distribution in high density NAND flash. The proposed scheme drastically reduces the output ripple and improves the system stability. Besides, the high voltage regulator occupying large area in conventional generator is not necessary anymore. The generator with an area of 0.55mm
²
has been designed in a 0.18μm CMOS process under 1.8V supply voltage. Under the equivalent load condition of 3D NAND Flash, the post-layout simulation results show that the range of output voltage is 15.5V to 23V and the maximum ripple voltage is 1.18mV at 10MHz clock frequency.