A 12-Bit Synchronous-SAR ADC for IoT Applications

This paper presents an energy-efficient 12-bit successive-approximation register (SAR) analog-to-digital converter (ADC) for biomedical and IoT applications. The synchronous SAR ADC operation was applied to meet the scaling of the sampling frequency for extending the battery life. The full capacitor swapping scheme was proposed to maintain both small input capacitance, better ADC linearity and SNDR. The 12-bit ADC was fabricated using a 180-nm CMOS technology. This prototype ADC consumes only 730 nW from a 0.7-V supply at 100-kS/s. With the Nyquist rate input, the measured SNDR and SFDR are 64.2 and 75 dB, respectively. The ENOB is maintained at 10.4 bits, equivalent to a figure-of-merit of 5.6 fJ/conversion-step. The sampling frequency can be scaled from 100 kHz to 1 kHz with ENOB > 10.4 bits.