Analog High Speed Video Buffer ASIC for Large Capacitive Load Applications

High Speed Multi-Port Detectors like linear/array or TDI (Time Delay and Integration) CCDs (Charge Coupled Devices) are in widespread use in modern day high resolution satellites. Camera electronics design for these detectors require processing of multiple analog video ports at high speed. Furthermore, due to large swath requirements, multiple detectors are required to be placed in close proximity, resulting in shortage of resources near the focal plane. Consequently, the video processing electronics is constrained to be placed away from the focal plane. However, since most of the CCDs have low driving capability(<;4pF), they are incapable of driving large capacitive loads induced by the interface harnesses/flex cables used between the focal plane and the video processing electronics. This paper proposes an analog high speed video buffer ASIC with a UGB (Unity Gain Bandwidth) of 106MHz (at 30pF load) and DC Gain of 72dB and a sufficiently small input capacitance (<;1pF) and power consumption of <;100mW with a load of 30pF. The device is capable of driving cable lengths of the order of 400mm, followed by the input capacitance of the digitizer (
_~
10pF). The proposed video buffer is targeted to be realized indigenously through 0.18um SCL CMOS process.