Introduction
Channel loss is a dominant factor for the signaling performance of high-speed I/O. Some platform design guides clearly specify the printed-circuit board (PCB) loss requirement. During the initial design phase for PCB material selection, platform designers would like to have the accurate and efficient insertion loss measurement to meet the channel loss requirement because the PCB material contributes largely to the platform cost. An improper selection of PCB material may lead to either a costly over design or an increased risk of platform performance. Insertion loss is one of widely employed indicator to select proper quality of PCB material. However, there are a lot of factors affecting insertion loss measurement quantity such as de-embedding methods [1]-[5], probes footprint designs, measurement arts, test board stack-up designs and etc.