A Novel Phase-Locked Loop-Enabled Power Estimator for Single-Phase Power Electronic Converters

This paper proposes an active and reactive power estimator incorporating a novel phase-locked loop (PLL) for single-phase power electronic applications. The proposed estimator includes: 1) a new PLL algorithm preceded by a smooth variable structure filter (SVSF) to synchronize grid voltage signal and minimize the noise influence of the grid voltage signal and 2) a fast upper-triangular and diagonal recursive least square (FUDRLS)-based active and reactive power estimation algorithm using instantaneous power signal and estimated phase angle from the proposed PLL. The proposed method provides more accurate and faster active and reactive power estimation than conventional recursive least square (RLS)-based and discrete Fourier transform (DFT)-based methods. Moreover, the proposed estimator is relatively insensitive to noise since the SVSF is inherently robust to noise and to modeling uncertainties. Due to its low computational complexity and numerical stability, the proposed method is suitable for the real-time embedded system to estimate active and reactive power and for an alternative PLL method for control applications of the grid-connected converters.