A Comprehensive Flowchart to Maximize the Outcome of Direct Power Injection Tests

The direct power injection (DPI) test method was developed with the intention of achieving a strong correlation and repeatability in measuring the conducted immunity (CI) of integrated circuits (ICs). Nonetheless, in practical implementation, this goal can be compromised by different factors. For example, it is not uncommon to come across DPI tests performed in 3-dB increments. However, this level of uncertainty at 27 dBm could result in peak voltage amplitudes ranging from 5 to 10 V when considering an infinitely high impedance. Furthermore, in the process of finding a failure, only the performance at the threshold where the failure is observed is typically recorded, while the behavior of the IC (before the failure occurs) is ignored. However, this trend carries significant value for IC designers, as failure modes demonstrate a stronger correlation to simulations than absolute levels. This letter introduces a series of enhancements to the DPI flow, specifically targeting the reduction of the result uncertainty, the extraction of maximum information from each test, and the achievement of time-efficient execution. Furthermore, these improvements can be seamlessly extended to accommodate any other conducted or acrlong RI test. Focused on the day-to-day challenges of technicians and engineers, this letter is addressed to individuals interested in enhancing preexisting methodologies for reducing DPI uncertainty, improving test repeatability and its efficiency.