Reduction of Common Mode Voltage Through Improved Three-Phase Inverter Topology

This paper aims to present a three-phase inverter topology to reduce the common mode voltage(CMV) variations. First, the role of the switching device's junction capacitance in the transition from active state to inactive state is explained, which is based on a typical H8 inverter topology. Then, through theoretical analysis, the drawbacks of the clamping H8 topology and control strategy are clarified, the CMV of which cannot be clamped as expected. Therefore, based on the foundations, the clamping H8 topology inverter with paralleled resistors is proposed to reduce the CMV variations during the transition from active states to inactive states. And the improved modulation method is employed to eliminate the effect of the dead time on the waveform of CMV. Comparisons between the conventional H6 topology and the proposed H8 topology is carried out. The proposed conversion structure with the improved modulation method shows better performance in terms of CMV variations and EMI reduction, which is verified with experimental results.