A LOW-POWER HIGH-RESOLUTION ALL-DIGITAL ON-CHIP JITTER SENSOR FOR A 1-3 GHZ CLOCK GENERATOR

The accurate jitter information is helpful for improving the performance of a GHz clocking system. In this paper, we introduce a low-power and high resolution on-chip jitter sensor (OCJS) for monitoring the on-chip clock jitter in a 1 GHz to 3 GHz clock generator. The design is evaluated according to post-layout simulation results in 28nm CMOS technology. The simulation results show that the timing resolution and measurable jitter range specification are met under extreme operating condition while achieving 80% power reduction compared to the conventional OCJS designs.