CCD Signal Processing Circuit Based On Correlated Double Sampling

The main noise in the output signal of the CCD (Charge Coupled Devices) Image Sensor is the reset noise. Therefore, the suppression and weakening for the reset noise of the CCD output signal reduction is a very important technology in CCD signal processing circuit. A CCD signal processing circuit based on the technology of CDS (Correction Double Sampling) and PGA (Programmable Gain Amplifier) is designed in this paper. Through the simulation and verification, the range of input signal is 0V~2.85V, the maximum operating frequency is 40MHz, the SFDR of output signal can reach 80dB.