Dynamic Phasor Modeling of SRF-PLL Based Grid-Tie Inverter Under Islanded Conditions

Synchronous reference frame (SRF) phase locked loop (PLL) is a widely employed scheme for synchronization of three-phase grid-tied inverters (GTI). The SRF-PLL model discussed in the literature for analysis assumes a voltage source being present at the point of common coupling (PCC) in the form of the grid. The case of grid-disconnection and a subsequent unintentional island formation is typically not considered. In this work, a dynamic-phasor based complex domain analysis of the SRF-PLL model is proposed that is suitable for studying the behavior of an unintentionally islanded GTI. The model accurately predicts the steady-state operating frequency of the system after the unintentional island formation, for UPF as well as other operating power factors of the GTI with varied load conditions. Simulation and experimental results of islanding conducted on a 4.5kVA three-phase GTI system are presented that validate the proposed analytical approach and the resulting system model.