I. Introduction
Physical Unclonable Functions (PUFs) [1] are designed to extract physical randomness from the underlying circuit. PUFs have the advantage of generating chip-specific responses to the same challenge. Hence, they are normally used in device-level authentication and key generation applications [2]. Arbiter PUF (APUF) [3] is a timing-based PUF. Due to manufacturing variations, there are small random delay differences on symmetrical electrical paths. Theoretically, the entropy of the delays should be sufficient to ensure a unique PUF response for each individual device instance. However, previous work reports that conventional APUFs generate low-unique responses among devices [4], [5]. The main reason of this “non-ideal” uniqueness performance is systematic bias introduced by (1) unequal-length wiring and (2) non-stochastic doping process during chip manufacturing. To resolve this issue, Machida et al. proposed a DAPUF structure and which enhanced the APUF uniqueness by XORing the responses of duplicate selector chains [6]. This structure is technologically inexpensive because it does not require any special manufacturing processes to achieve this uniqueness improvement. However, it leads to large space and power overhead.