Hardware design on FPGA for Ethernet/SONET bridge in smart sensor system

This paper presents a packet bridge between Ethernet and Synchronous Optical Network (SONET) with format transformation in smart sensor system. The transformed packet can be fed to the optical fiber, which proceeds with various features such as high speed, long distance, and low interference. With SONET, the packet bridge performs with high speed, long distance, low interference, and good-property in sensor system, whereas the bridge works without those features in electrical transmission. The packet bridge is designed and implemented with Verilog Hardware Description Language (HDL) and verified with FPGA development board with RS485 serial port. Measured results show that the operation frequency, throughput, data transfer rate of RS485, and data transfer rate of Ethernet are 125 MHz, 633,661,952 bps, 115,200 bps, and 1 Gbps, respectively, at the data volume of 8 bits, a RAM of 2 k bytes, and a FIFO of 1 k bytes.