Simulation for the feasibility of high-mobility channel in 3D nand memory

Vertical 3D NAND flash memory devices, featuring poly-Silicon (poly-Si) channel, have been anticipated to replace conventional planar NAND flash because of the difficult scaling below 15-nm regime due to the increased noise and cell-to-cell interference. However, the conduction inside a long poly-Si channel is significantly degraded due to the scattering at grain boundaries (GB) and interface defects, leading to a reduced and unstable drive-current (Id) with a broad distribution. In addition, the Id required for reading operations decreases with the increasing number of stacked memory layers, resulting in poly-Si unsustainable for long-term scaling. The purpose of this paper is to study alternative channel materials with electron mobility higher than poly-Si, as a feasible approach to enable further scaling for future 3D NAND generations. A series of Sentaurus TCAD simulations are performed to clarify the necessity for the adoption of high-mobility channel materials in 3D NAND.