An 89 nW instrumentation amplifier for IoT in 65 nm CMOS technology

This paper presents a low power instrumentation amplifier (IA) for the use in Internet of Things (IoT). A modified topology based on the INA321 by Texas Instruments of the two-opamp IA is used for its higher CMRR. The main design constraints are low power consumption and low noise. Two stage topology opamp is used for its capability of operating from a low supply voltage. Self-cascode technique enhances the open loop gain and allows the use of indirect compensation reducing the capacitor size. The drawback is reduced bandwidth however not a concern as many IoT applications exhibit narrow bandwidth. Post layout simulation is performed using Cadence Virtuoso 6.1.5 and TSMC 65 nm node. The designed opamp consumes 28.8 nW from a 0.4 V supply. Exhibits an open loop gain of 52 dB with phase margin 90 degrees. The IA has a fixed gain of 24 dB and bandwidth of 11 kHz. Common mode rejection of 83 dB is achieved. Total power dissipation is 89 nW.