Implementation of VS-PLL structure on FPGA and performaces evaluation

In this paper method of implementation VS-PLL structure on FPGA circuit is described as well performances of proposed structure are presented. It was pointed out that special attention should be paid to the method of mapping VS-PLL structure from a continuous to a discrete domain, in order to does not volatile given performances. Also, it has been shown that MATLAB with all its tools can be used to perform these complex tasks.