Hardware Realization of Mixed-Signal Neural Networks with Modular Synapse-Neuron arrays

In this paper, a mixed-signal current-mode structure of a feed-forward neural network is implemented. In this network, neurons are divided and distributed as sub-neurons into parallel elements composing unified synapse-neuron building blocks in combination with the synapses. Although in this brief paper a resistive sigmoidal neuron is considered, the neuron is adaptable to other forms of transfer functions. The synapse structure employs AND gates in addition to weighted current mirrors to reduce the area of the design. As a proof of concept, a 4-3-2 CMOS-based network is implemented. The average and maximum power consumptions of the network are 0.93mW and 5.81 mW respectively. The area of the entire network is measured 142299.5μm
²
. The network was successfully tested with a series of sample patterns.