A VCO-free low-power fully digital BPSK demodulator for implantable biomedical microsystems

In this paper, a power efficient, fully digital BPSK demodulator is proposed. The design employs a CMOS clipper circuit to clamp all peaks of the negative and positive of the received BPSK signal. Since the acquired reset signal from clipper circuit has double frequency with respect to the digital BPSK signal, a digital frequency divider is used to get the desired reset signal. By the sampling the digital BPSK signal at the edge of the reset signal, the data can be recovered. This technique does not require a voltage controlled oscillator (VCO). The proposed BPSK demodulator has been designed and simulated in 0.18 pm CMOS technology at 10 MHz carrier frequency. The results show that the proposed demodulator consumes 14 pW using a 1.8 V power supply and it occupies 32×35 pm
²
active area.