Sub-100-nm gate-length scaling of vertical InAs/InGaAs nanowire MOSFETs on Si

We demonstrate a process to vary the gate-length of vertical MOSFETs on the same sample with high accuracy and high performance. Fabricated vertical InAs/InGaAs MOSFETs on Si have gate length ranging from 25 nm to 140 nm. The results shown are from single nanowire transistors as well as arrays with nanowires ranging from 80 to 500 nanowires. The devices show good yield and clear scaling trends. We demonstrate a device with gm = 2.4 mS/μm and a device with Ion = 407 μA/μm at I
_oof
= 100 nA/μm and V
_dd
= 0.5 V, which both are record values for vertical MOSFETs. This is the first demonstration of vertical MOSFETs having gate-lengths comparable to the state-of-the-art lateral III-V MOSFETs.