Design of a compact fractional-N PLL-based frequency synthesizer for dual-band DBS applications

A compact fractional-N PLL-based frequency synthesizer, that delivers both 9.75 GHz and 10.6 GHz LO signals for dual-band digital broadcast satellite (DBS) applications, is presented in this paper. It is implemented utilizing a fractional-N PLL packaged IC with integrated VCO in combination with a fourth-order active loop filter. The overall circuit performance is simulated with the help of ADI's PLL Design software. A compact and low cost bias tee with low noise coupling effect is optimized with lumped components to minimize the phase noise degradation of reference signal due to the DC-associated noise. The measured phase noises of the frequency synthesizer are below -108 dBc/Hz@100 kHz for both 9.75 GHz and 10.6 GHz output signals, which is around 13 dB better than the phase noise specification for LO in current commercially available DBS receivers.