Package parasitics analysis for input / output digital ports

Latest steps in evolution that we are seeing in high speed digital devices are quite remarkable. As signal speed of these devices rise, all elements along signal pathway need to be taken into account during design stage. The materials used to build the devices mentioned have certain properties that are useful and some other properties that may produce undesired effects, including signal distortion. This paper is focused on simulation and analysis of parasitic elements inside microcontrollers input and output ports that may influence signal integrity at high speeds.