Carrier-based PWM technique applied to single-phase asymmetric NPC inverters with three levels on input and seven on output, using FPGA

This paper presents a carrier-based pulse width modulation (PWM) technique applied to three-level NPC single-phase asymmetric multilevel inverter. The PWM technique along with the asymmetrical dc voltage condition allows for seven levels on the output AC voltage, providing two levels more than the equivalent symmetrical single phase inverter. Therefore, the Total Harmonic Distortion (THD) of the output voltage is highly reduced. To verify the proposed PWM strategy, simulations were performed and an experimental prototype was implemented, using a Field Programmable Gate Array device (FPGA) for the PWM modulator. The simulation and experimental results demonstrate the effectiveness of the modulation strategy.