216–256 GHz fully differential frequency multiplier-by-8 chain with 0 dBm output power

This work presents a fully-differential wideband and low power 240 GHz multiplier-by-8 chain, manufactured in a 130 nm SiGe:C BiCMOS technology with f
_T
/f
_max
= 300/500 GHz. A 30 GHz input signal is multiplied by 8 using a Gilbert cell based quadrupler and doubler and then amplified with 3-stage cascode amplifier. To achieve wide bandwidth and optimize for power consumption, the power budget has been designed in order to operate the frequency multipliers and the output amplifier in saturation. With this architecture the presented circuit achieves a 3 dB bandwidth of 40 GHz, with a relative 3 dB bandwidth of 17%, and a peak saturated output power of 0 dBm. It dissipates 255 mW from 3 V supply which results in drain efficiency of 0.4%, while occupying 1.2 mm
²
. With these characteristics the presented circuit suits very well as a frequency multiplier chain to drive balanced mixers in 240 GHz transceivers for radar, communication and sensing applications.